In high-speed signaling communication standards, the transmitted data is converted by a physical medium-dependent (PMD) device to a physical voltage signal. Ideally, the voltage signal should have one of M several possible voltage levels (e.g., M=2 for the PAM2(Pulse Amplitude Modulated 2-level) signaling scheme, which maps “0” bits to one voltage level and “1” bits to another voltage level). The transitions between these levels should occur only at specific times (integer multiples of a “unit interval” or UI) that correspond to a perfect clock. A clock with the same frequency is used in a receiver in order to sample the received signal and reconstruct the transmitted data.
In practice, the voltage levels generated by transmitters deviate from the desired levels, as do the timing of transitions between levels. The voltage deviations create noise that adds up to other noise sources and reduces the noise immunity of the receiver. The timing deviations may also be considered as additional noise, and might also cause the receiver clock to sample at incorrect times. Thus, communication standards that specify voltages and frequencies typically limit the allowed deviations from the specified values. Timing deviations observed on the transmitted signal are called “jitter”. Jitter specifications are an important part of high-speed signaling standards. As the signaling speed increases, the UI gets shorter and jitter should decrease proportionally. The jitter specifications are thus typically stated as fractions of a UI.
Jitter is typically separated into low frequency and high frequency components. Low frequency jitter (sometimes called “drift” or “wander”) typically originates from Phase Lock Loop (PLL) phase noise. It is assumed to be tracked by the receiver, and thus is of low interest. High frequency jitter is created either from PLL phase noise or from other causes; it is assumed to be impossible to track, and thus must be limited to prevent sampling errors in the receiver. It is sometimes further divided into components of clock deterministic jitter (CDJ) and clock random jitter (CRJ) to capture its statistical properties. Duty cycle distortion (DCD) is a special kind of DJ sometimes measured separately—difference between even and odd bit width (a common phenomenon in some transmitters, which has a large effect on receiver performance). DCD is also called even-odd jitter (EOJ).
At very high speeds, the communication medium is band limited and inter-symbol interference (ISI) becomes significant. ISI causes both voltages and transition times to change; thus a signal observed through an ISI medium will have increased jitter, which cannot be tracked by the receiver. If not handled, ISI-induced jitter can become a performance bottleneck; indeed, jitter measurement methods for optical links require using test signals that reveal the maximum effect of ISI, such as PRBS31(31-bit Pseudo-random bit sequence). This can be seen in annex 83A of IEEE 802.3 and further in the older annex 48B (both omitted for brevity).
However, ISI due to a channel that has a linear transfer function can be mitigated to a great extent by applying equalization, either at the transmitter or at the receiver (with some well-established methods). Therefore, jitter that appears due to ISI can be tolerated and need not be as tightly limited as other jitter sources, if equalization is assumed.
Past specifications that assumed equalization is used to mitigate ISI re-used older jitter measurements, but tried to minimize the ISI effect on jitter measurements by measuring very close to the transmitter (thus minimizing ISI). For example, IEEE 802.3ap, which defined Ethernet at 10 Gb/s over passive backplanes (10GBASE-KR), specified jitter measured on a test point close to the transmitter (TP1), as shown in FIG. 1.
When such close measurement is not possible, one path taken was assessing the ISI effect in a separate measurement called “data-dependent jitter” (DDJ), and subtracting it from the measured jitter. For example, IEEE802.3ba-2010, which defined Ethernet at 40 and 100 Gb/s over copper cable assemblies (40GBASE-CR4and 100GBASE-CR10), specified jitter to be measured at a test point after a connector (TP3) that is separated from the transmitter by a lossy PCB, so ISI can occur; this is depicted in FIG. 2. To mitigate the ISI caused by the channel between the device and the test point, DDJ is measured separately and the jitter is specified with DDJ excluded.
In addition to limiting jitter, standards also attempt to limit the transmitter noise, but this is typically done using a separate measurement. For instance, 10GBASE-KR (clause 72) specified a special test pattern and method for noise measurement on “flat” regions of the signal, where the transmitter's equalization should have no effect. As shown in FIG. 3, the deviations Δve and Δv5 are measured and limits are specified along with the signal amplitude (establishing a transmitted signal-to-noise ratio). For the 40GBASE-CR4and 100GBASE-CR10cases, such measurements are problematic, since the lossy PCB can distort the test pattern and increase the measured “noise” (Δv2 and Δv5) although it is actually a linear effect that is mitigated by equalization. Therefore, a different, indirect method is defined, where the noise is measured after a channel, on an arbitrary point in the test pattern (which should not suffer from 1SI), and then other known noise sources are subtracted (assuming noises are power-summed).
There are four major problems with these specification methods. First, both jitter and noise measurement methods are specific to PAM2modulation, and cannot be easily translated to higher-order PAM schemes, such as PAM4(4-level) which is used in 100GBASE-KP4. Second, since both jitter and noise are transmitter effects that contribute to noise seen by the receiver, it would be better to limit their combined effect, rather than each one separately. This way some design freedom would be created. Combining the specifications is difficult since jitter is measured and defined in time unit, while noise is measured and defined in voltage units. Third, the measurement contains many steps, some of which require non-trivial calculations that are typically done by specialized test equipment. Fourth, It is difficult to justify the limits defined for each of the effects with standard system engineering methods such as noise budgeting. The limits specified represent some agreement between engineers that building such transmitters are feasible, and that such transmitters should be “good enough” for operation in the specified standard (which also define channels and receivers), but there is no proof or rigorous analysis.